Semiconductor Engineering

Fast Interrupt Extension For MCU RISC-V

A technical paper titled “CV32RT: Enabling Fast Interrupt and Context Switching for RISC-V Microcontrollers” was published by researchers at ETH Zurich and University of Bologna. “Processors using the ...
Electronics Weekly

SiFive has licenses C++ library for Risc-V

IC intellectual property company SiFive has licensed Segger’s emRun++ C++ library for Risc-V, a library optimised for GCC/LLVM-based tool chains and embedded systems, based on the emRun and emFloat ...
Hackaday

Writing A RISC-V OS From Scratch

If you read Japanese, you might have seen the book “Design and Implementation of Microkernels” by [Seiya Nuda]. An appendix covers how to write your own operating system for RISC-V in about 1,000 ...
Design-Reuse

Andes Technology Corp. Targets Deeply Embedded Protocol Processing and Entry-level MCUs With the New N22, the Smallest RISC-V Core in its V5 Family

N22 Delivers up to 3.93 Coremark/MHz, in as little as 15K Gates with Highly Flexible Interfaces and Debug Support HSINCHU, TAIWAN, Feb. 12, 2019 – Andes Technology Corporation, a leading supplier of ...
Design-Reuse

A Chip Designer’s Perspective of RISC-V Traps

Understanding RISC‑V traps is essential for Chip Designers building RISC‑V CPUs, microcontrollers, and complex SoCs. It’s equally important for Embedded Engineers who develop and debug software stacks ...
Geeky Gadgets

RISC-V Vector Processing: A New Era in Computing Efficiency

The computing industry has reached a significant milestone with the ratification of the 1.0 RISC-V Vector Specification. This development marks the beginning of a new era in computing efficiency, as ...