SANTA CLARA, Calif. — Engineers are struggling with old and new signal integrity issues as they drive toward designs in the 5 to 10 Gbit/s range, according to a panel of experts at DesignCon. The ...

Many small and large design teams use third-party IP (intellectual property) to accelerate SOC (system-on-chip) design by importing functional blocks, such as data converters, PLLs, Ethernet PHY ...

Check out more coverage of DesignCon 2023. This article is also part of TechXchange: PCB Tools and Technology. In electronic systems, electrical signals tend to travel through a wide range of ...

Arrow, Microchip , Bourns, and Amphenol have come up with an evaluation platform – the 10BASE-T1S REF_SPE_T1S reference design board. The design assists engineers in adopting Single Pair Ethernet (SPE ...

Leading-edge chip desiLeading-edge chip design was never easy, but it’s getting harder all the time. Rapid advances in communication systems are driving data rates higher. With the emergence of ...

Bert Simonovich has spent over five decades in electronics, starting with T1 line repeaters and backplanes in the telecom industry. Little did he know that his early work would lead him to become a ...

As a signal travels across a network, it focuses only on what it sees in its path. And increases in data rates over the past few decades have made this path a bit more clouded. System infrastructure ...

Signal integrity is a critical design consideration in modern electronic systems, particularly those that depend on high-speed interconnects. As data rates climb and interconnect geometries become ...

Signal integrity (SI) and power integrity (PI) are two distinct but related realms of analysis concerned with proper operation of digital circuits. In signal integrity, the main concern is making sure ...

Signal integrity is one of the many challenges faced by chip designers. Deep submicron technologies are unfriendly hosts for the nice, clean signals desired. The culprits that compromise signal ...